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Showing items 1-25 of 197693. (7908 Page(s) Totally) 1 2 3 4 5 6 7 8 9 10 > >> View [10|25|50] records per page

Date	Title	Authors
2008-10	0-3歲兒童家庭物理環境評估量表之信效度：系統性回顧	謝伃鑫; 賀葳; 廖華芳
2006-11	0-3歲嬰幼兒發展與研究彙編－進入嬰幼兒的語言世界	劉惠美; 曹峰銘
1999	0.005% latanoprost 局部點眼劑對兔子結膜形態變化之探討	王清泓
2010	A 0.02-mm2 9-bit 50-MS/s Cyclic ADC in a 90-nm Digital CMOS Technology	Huang, Yen-Chuan; Lee, Tai-Cheng
1990-05	0.1% Indomethacin 眼藥水用於白內障手術之效應	劉秀雯; 顏如娟; 王泰元; 蔡述彬
1992-09	0.1% Indomthacin 對氬氣雷射虹膜穿孔術後眼壓之影響	王倫奕; 劉秀雯; 王泰元
2004-06	A 0.1-23-GHz SiGe BiCMOS analog multiplier and mixer based on attenuation-compensation technique	Tsai, Ming-Da; Lin, Chin-Shen; Wang, Chi-Hsueh; Lien, Chun-Hsien; Wang, Huei
2008	A 0.18-μm CMOS 1.25-Gbps Automatic-Gain-Control Amplifier	Wang, I-Hsin; Liu, Shen-Iuan
2004	A 0.3-25-GHz ultra-wideband mixer using commercial 0.18-μm CMOS technology	Tsai, Ming-Da; Wang, Huei
1989-05	0.5% Betaxolol 降眼壓作用的評估	王倫奕; 劉佩芬; 劉秀雯
2003-06	A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier	Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei
2009	0.5-V 5.6-GHz CMOS Receiver Subsystem	Chen, H.-C.; Wang, T.; Chiu, H.-W.; Kao, T.-H.; Lu, S.-S.
2007	A 0.5–5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump	Chuang, Chi-Nan; Liu, Shen-Iuan
2009	A 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOS	Lu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung
2008	A 0.6 V, 4.32 mW, 68 GHz Low Phase-Noise VCO With Intrinsic-Tuned Technique in 0.13 μm CMOS	Chen, Hsien-Ku; Chen, Hsien-Jui; Chang, Da-Chiang; Juang, Ying-Zong; Lu, Shey-Shi
2003-06	A 0.6-22-GHz broadband CMOS distributed amplifier	Liu, Ren-Chieh; Deng, Kuo-Liang; Wang, Huei
2007	A 0.6V Low Power UWB CMOS LNA	Yu, Yueh-Hua; Chen, Y.-J.E.; Heo, D.
2007-03	A 0.6V Low Power UWB CMOS LNA	Yu, Yueh-Hua; Chen, Yi-Jan Emery; Heo, Deukhyoun
2007	0.6伏互補式金氧半導體類比電路之設計與實作	魏軍浩; Wei, Chun-Hao
2005-04	0.7 V Manchester carry look-ahead circuit using PD SOI CMOS asymmetrical dynamic threshold pass transistor techniques suitable for low-voltage CMOS VLSI systems	Chiang, T.Y.; Kuo, J.B.
2006	A 0.7–2-GHz Self-Calibrated Multiphase Delay-Locked Loop	Chang, Hsiang-Hui; Chang, Jung-Yu; Kuo, Chun-Yi; Liu, Shen-Iuan
2004-12	A 0.8 V CMOS TSPC adiabatic DCVS logic circuit with the bootstrap technique for low-power VLSI	Chen, H.P.; Kuo, J.B.
2002-08	A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture	Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan
2004-09	A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator	Liu, Tsung-Te; Wang, Chorng-Kuang
2008	A 0.8-mW 55-GHz dual-injection-locked CMOS frequency divider	Luo, Tang-Nian; Chen, Yi-Jan Emery

Showing items 1-25 of 197693. (7908 Page(s) Totally) 1 2 3 4 5 6 7 8 9 10 > >> View [10|25|50] records per page